Modulador sigma-delta digital em tecnologia CMOS 130 nm para redução de espúrios em modulação ASK

Abstract

This work presents the development of a first-order digital sigma-delta modulator with binary (1-bit) quantization, described in Verilog and synthesized in 130 nm CMOS technology, applied to ASK modulation systems in their binary form, also known as Binary Amplitude Shift Keying (BASK), aiming at the reduction of clock frequency spurs. The methodology includes the theoretical study of sigma-delta modulators, followed by the design, simulation, and integration of the circuit into the system-level control of the ASK carrier, where the generated bitstream is used to dither the switching signal. Analysis was carried out through time-domain simulations using GTKWave and spectral evaluations via Fourier Transforms (FFT) in Python, allowing comparison of the ASK signal spectrum with and without the application of the sigma-delta modulator. The results demonstrate that dithering with the sigma-delta modulator significantly reduces the amplitude of spurs near the carrier frequency without compromising the integrity of the modulated signal. It is concluded that the proposed technique is effective and feasible for improving spectral purity in digital transmitters, offering a simple and low-cost digital alternative to traditional analog filtering.